// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/b/RAM16K.hdl

/**
 * Memory of 16K registers, each 16 bit-wide. Out holds the value
 * stored at the memory location specified by address. If load==1, then 
 * the in value is loaded into the memory location specified by address 
 * (the loaded value will be emitted to out from the next time step onward).
 */

CHIP RAM16K {
    IN in[16], load, address[14];
    OUT out[16];

    PARTS:
    DMux4Way16(in=in, sel=address[0..1], a=inA, b=inB, c=inC, d=inD);
    DMux4Way(in=load, sel=address[0..1], a=loadA, b=loadB, c=loadC, d=loadD);

    RAM4K(in=inA, load=loadA, address=address[2..13], out=outA);
    RAM4K(in=inB, load=loadB, address=address[2..13], out=outB);
    RAM4K(in=inC, load=loadC, address=address[2..13], out=outC);
    RAM4K(in=inD, load=loadD, address=address[2..13], out=outD);

    Mux4Way16(a=outA, b=outB, c=outC, d=outD, sel=address[0..1], out=out);
}